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Earlier sources: Chips
This hardware thread follows chips through original research, public projects, and source reports. Read the evidence below to see which developments are represented in SYMTRI’s archive.
SYMTRI organizes observations from public sources into a living map. Connections reflect shared subject matter; they do not establish causation or endorse a source.
Open in the map ↗159 classified signals in the fourteen-day window. These counts include signals awaiting readable evidence.
Earlier sources
Up to ten sources with readable evidence, ordered by their feed timestamp. These archive sources can be older than the live fourteen-day window. This list is a sample, not a measure of total activity. Dates distinguish paper publication, repository creation, model/dataset activity, Hacker News posts, and KEV catalog additions. “First archived” records when SYMTRI first stored the signal.
- OpenAlex · Published · First archived
Design of a 3D Aggregation Backbone Network-on-Chip Architecture for High-Speed Data Acquisition Systems ↗
Time-interleaved high-speed data acquisition (HS-DAQ) systems based on three-dimensional network-on-chip (3D NoC) architectures require efficient transmission of multi-channel sampled data. However, existing general-purpose NoC architectures are not well suited for the deterministic multi-source aggregation communication pattern of HS-DAQ systems, which may result in increased long-distance transmission overhead and localized traffic congestion. To address these issues, this paper proposes a 3D aggregation backbone network-on-chip architecture (3D AB-NoC) for HS-DAQ systems. This architecture…
- OpenAlex · Published · First archived
GPU-Accelerated Guided Heuristic Sampling for Residual Error Probability Analysis in CAN FD Communication ↗
The deployment of automated driving features demands stringent compliance with ISO 26262, particularly concerning data integrity over in-vehicle networks. This study effectively addresses the computational challenges of quantifying the residual error probability of Classical CAN and CAN FD communication under high-order fault profiles. By introducing a GPU-accelerated residual error analysis framework utilizing OpenCL, it overcomes the mathematical barriers of traditional brute-force simulation, elevating execution speeds from 150,000 to 4.2 million iterations per second. Empirical evaluations…
- OpenAlex · Published · First archived
A superheterodyne 300 GHz receiver and transmitter chip set with high bandwidth and efficiency performance ↗
Abstract This paper presents a superheterodyne receiver and transmitter chip set with high bandwidth and efficiency suitable for superheterodyne communication systems. The operating range for the intermediate frequency is optimized for 60–90 GHz but extends beyond this frequency range. A radio frequency range from 285 and 325 GHz is achieved with the chip set introduced here. This paper presents continuous-wave on-wafer measurements for the receiver and transmitter. In the measurements, the transmitter achieves an output-referred 1 dB compression point of 0 dBm across the entire IF range. The…
- arXiv · Published · First archived
Differentiable astrophysics at scale: solving and differentiating ODE ensembles on the GPU ↗
Astronomers increasingly fit their models with gradient-based methods, such as Hamiltonian Monte Carlo, which need the derivatives of the model with respect to its parameters. In many analyses a prediction requires solving a small system of ordinary differential equations (ODEs) for thousands to millions of parameter sets, and this ensemble of integrations often sets the cost of the analysis. We introduce to the astronomical community GRADSOLVE, a JAX library that moves this computation to graphics processing units (GPUs): it integrates each member of the ensemble in its own GPU thread with it…
- GitHub · Repository created · First archived
cz413/LabDeck ↗
本地优先的 Windows 实验室服务器工作台：集中管理多台服务器 SSH 会话、NVIDIA GPU 监控、SFTP 和 VS Code Remote-SSH，无需部署服务端。
- OpenAlex · Published · First archived
An On-Chip-Calibrated Coarse-Fine FPGA Time-to-Digital Converter for Single-Photon LiDAR: Design and Experimental Validation ↗
Long-range single-photon LiDAR requires both a wide time-of-flight (ToF) dynamic range and fine temporal resolution, while the nonuniform fine-time bins of FPGA carry-chain tapped delay lines (TDLs) can introduce systematic errors into time reconstruction. This work presents a coarse-fine FPGA time-to-digital converter (TDC) with on-chip code-density calibration implemented on a Xilinx Kintex-7 XC7K325T device. A 250 MHz coarse counter is combined with a CARRY4-based TDL for sub-cycle fine-time quantization, and code-density accumulation, lookup-table (LUT) construction, and calibrated time re…
- OpenAlex · Published · First archived
Unraveling the dielectric heterogeneity response of cell lines under electroporation: a microfluidic single-cell on-chip system ↗
In the clinical application of irreversible electroporation for tumor therapy, individual differences in cellular electrical responses often lead to the reliance on empirically selected treatment parameters, which easily cause over/under-treatment in patients and hinder the development of precision tumor therapy. To clarify the response mechanism induced by single-cell individual differences, this study developed an experimental platform integrating microfluidic chip technology, dielectrophoresis (DEP), electrorotation (EROT), and electroporation (PEF) technologies, enabling the full process o…
- OpenAlex · Published · First archived
Microarray chip based on surface-enhanced raman scattering-chiral anisotropy for ultrasensitive detection of Aβ42 as an Alzheimer’s disease-associated serum biomarker ↗
In this study, a highly sensitive surface-enhanced Raman scattering-chiral anisotropy (SERS-ChA)-based microarray chip was fabricated for the quantitative analysis of β-amyloid protein (Aβ42) in Alzheimer’s disease (AD). To construct the chip, D-type chiral gold nanoparticles (CG NPs) were employed as the plasmonic substrate, creating uniformly distributed and densely packed hotspots. The localized chiral plasmonic electromagnetic fields generated at the chiral hotspots provide a chirality-dependent enhancement preference for Aβ42 molecules, leading to significant enhancement of their characte…
- OpenAlex · Published · First archived
Correlation between the chip geometry and the occurrence of chip welding in dry gear hobbing ↗
Since the introduction of dry gear hobbing in the early 1990s, coolant-based machining has been replaced in many applications due to the economic and environmental benefits. However, the elimination of coolant has led to an increase in the occurrence of surface defects on the tooth flanks during dry gear hobbing, such as smearing, streaking or chip welding. Gears with surface defects are considered scrap. While there are methods to detect and prevent smearing and streaking, gears must be inspected on a regular basis to reliably detect chip welding. Avoiding surface defects in general, and chip…
- GitHub · Repository created · First archived
MatheusFerreiraS/neural-amd-opti ↗
Modified OptiScaler focused on adding neural-rendering and a bridge between Ray-Reconstruction and Ray-Regeneration
Live window recorded . This is the ingestion observation time, not the publication or discovery date of each source.
How to assess evidence about Chips
Check each original source for its methods, release status, limitations, and supporting data. A repository announcement, a preprint, and a published study provide different kinds of evidence. SYMTRI’s subject classification helps discovery; it does not independently validate the source’s claims.
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